Mixing fixed and reconfigurable logic for array processing
نویسندگان
چکیده
This paper descnbes the arcliitectuie of the M Y systeni that was designed to iiivestigate tlie trade-off between the iise of iecorlfigrrinble and j k e d logic The calcufatioii of the dot-piadiict of hvo vectors of 32 bit jloatiiig poiiit iniiribers, that foiws the basis of ai.ray processiiig i i i iiiaiy erigiiieeriiig applicatioiis, I S used as the basic algoi.irhni f o r the irivestigatioii. The issiilts iiidicate thatfired logic is inore suited forJoatirig poiiir i ir i i f i arid iiieriiories while iecoiifigiirable logic is usejiil for inipleriieritriig conti-ol logic providing sigriificarit jlexibiliy It was also fouiid tliat the additional delay i i i recorijgui.able logic can effective& or.ei*lap wtli the operatirig tiiiie of the J.vrd logic sirbsystetiis The advanrage of i~eco&iii*abili~ of the coiiti.ol is tliervfoi .E cotii biiied wtli tlie liigli baiihrxitth propei.ries of the fixed logic.
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